ISLP

An asynchonous multiprogramming environment

The Isolated-Linear Processor is an asynchronous environment for building dynamic ranges of behavior, from ultra-low-power event handling to high-throughput parallel execution. The 144-node multicomputer architecture supports dense process programming, distributed control, and mixed-signal system design where timing, energy, and determinism all matter at once.

Explore the specifications here, and when you are ready to go deeper, download the full product brief below.

Key Specs
  • 144 independent modular computers in an 18x8 asynchronous array
  • Up to 96 billion operations per second at application-dependent duty cycle
  • Power profile from microwatts to sub-watt operation - peak is under 650 mW
  • High-impedance inputs, analog I/O, programmable GPIO, SERDES, SPI and parallel buses
  • Boot options over SPI and serial protocols with ROM support and custom ROM availability

Architecture overview

The Isolated-Linear Processor is an intuitive fabric of fully-described nodes that execute independently and communicate through local ports. This allows fine-grain scheduling at the node level, near-instant suspend/resume behavior, and direct mapping of pipelines and flowgraphs.

The summaries below highlight the practical attributes teams care about first - execution model, I/O posture, memory distribution, and integration behavior. Together they show how the ISLP moves from architectural theory to deployable system design.

Node model

Each node can execute a basic ALU operation in approximately 1.5 ns, with picosecond-scale control over activity windows.

Edge-specialized nodes

Perimeter nodes provide GPIO, analog channels, SERDES, SPI, and synchronization paths used to bridge the fabric to external systems.

Distributed memory

RAM and ROM are distributed across the node array, reducing centralized bottlenecks and enabling tightly scoped local behaviors.

Event-driven response

Suspended nodes can react to internal events at picosecond scale and external events at nanosecond scale for fast control-loop behavior.

Digital throughput

Aggregate digital bandwidth exceeds multi-gigabit rates through software bit parsing, with additional bandwidth when both SERDES paths are active.

Boot flexibility

Platform bring-up supports SPI flash and multiple serial protocols, enabling easier integration into custom board and product environments.

External memory control

Dedicated node clusters can directly manage external SRAM/SDRAM interfaces for larger programs and higher-level execution models.

Energy scaling

Power draw scales with node duty cycle, allowing designs that run from very low-energy states up to high-performance compute modes.

Summary of capabilities of the Isolated-Linear Processor profile

  • 25 programmable digital I/O pins
  • Five analog inputs and five analog outputs
  • Two 18-bit parallel interfaces
  • SERDES support for high-speed channels
  • SPI and serial boot pathways
  • Operational range: -40 C to 125 C
  • Asynchronous 18x8 node geometry for parallel flowgraphs
  • High-impedance input behavior for mixed-signal interfacing
  • Distributed RAM and ROM across the full processor fabric
  • Low-overhead node suspend/resume control for dynamic workloads

Application fit

The platform is designed for workloads that benefit from many parallel compute paths, deterministic control edges, and low energy per operation.

  • Machine intelligence pipelines and Bayesian network workloads
  • Reinforcement learning control loops and robotics/autonomy
  • Remote sensing, data reduction, and edge signal processing
  • Cryptographic clusters and simulation/synthesis pipelines
  • Image/video processing with spatial and temporal filtering

Software model

The Isolated-Linear software support model includes a compiler, simulator, and interactive development and debugging environment. The stack is designed to be extensible for custom control environments and workload orchestration patterns.

  • Compile and partition workloads into node-local tasks.
  • Simulate communication flow and timing behavior before deployment.
  • Map runtime I/O interactions to edge nodes and external buses.
  • Scale into external SRAM/SDRAM scenarios for higher-level language execution.

Package and electrical envelope

The Isolated-Linear Processor is packaged in a 10x10 mm, 88-pin QFN - 0.4 mm pitch with central paddle grounding. The Isolated-Linear Processor supports a 1.62-2.0 V supply range, with an optimal level of 1.80 volts, and a core-current profile spanning suspended microampere levels to high-throughput operation in the hundreds of milliamps, with the ability to control systems in the hundreds of thousands of volts.

Physical package

  • 10x10 mm QFN package
  • 88 pins, 0.4 mm pitch
  • Grounding through central die-attach paddle

Operating envelope

  • Temperature range: -40 C to 125 C
  • Designed for demanding and radiation-intensive environments
  • Low suspended current with rapid event response behavior

Product brief

Review the scope and capabilities of the Isolated-Linear Processor to evaluate fit for your application.